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1 KB3440 micropower synchronous buck-boost dc/dc converter single inductor fixed frequency operation with battery voltages above, below or equal to the output synchronous rectification: up to 96% efficiency 40 a quiescent current in burst mode ? operation up to 600ma continuous output current no schottky diodes required (v out < 4.3v) v out disconnected from v in during shutdown 2.5v to 5.5v input and output range programmable oscillator frequency from 300khz to 2mhz synchronizable oscillator burst mode enable control 5 a shutdown current small thermally enhanced 10-pin msop and (3mm 3mm) dfn packages palmtop computers handheld instruments mp3 players digital cameras the KB3440 is a high efficiency, fixed frequency, buck- boost dc/dc converter that operates from input voltages above, below or equal to the output voltage. the topology incorporated in the ic provides a continuous transfer function through all operating modes, making the product ideal for single lithium-ion, multicell alkaline or nimh applications where the output voltage is within the battery voltage range. the device includes two 0.19 1 n-channel mosfet switches and two 0.22 1 p-channel switches. switching frequencies up to 2mhz are programmed with an external resistor and the oscillator can be synchronized to an external clock. quiescent current is only 40 a in burst mode operation, maximizing battery life in portable appli- cations. burst mode operation is user controlled and can be enabled by driving the mode/sync pin high. if the mode/sync pin has either a clock or is driven low, then fixed frequency switching is enabled. other features include a 1 a shutdown, soft-start con- trol, thermal shutdown and current limit. the KB3440 is available in the 10-pin thermally enhanced msop and (3mm 3mm) dfn packages. efficiency vs v in li-ion to 3.3v at 600ma buck-boost converter sw1 v in shdn/ss mode/sync r t sw2 v out fb v c gnd 3 7 8 2 1 4 6 9 10 5 KB3440 l1 10 h r1 340k r2 200k r3 15k r t 60.4k c1: taiyo yuden jmk212bj106mg c2: taiyo yuden jmk325bj226mm l1: sumida cdrh6d38-100 *1 = burst mode operation 0 = fixed frequency c1 10 f li-ion v in = 2.7v to 4.2v * + c5 1.5nf c2 22 f v out 3.3v 600ma v in (v) 2.5 efficiency (%) 3.0 3.5 4.0 4.5 5.0 100 98 96 94 92 90 88 86 84 82 80 5.5 v out = 3.3v i out = 100ma f osc = 1mhz kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 applications features description typical application
2 parameter conditions min typ max units input start-up voltage 2.4 2.5 v input operating range 2.5 5.5 v output voltage adjust range 2.5 5.5 v feedback voltage 1.196 1.22 1.244 v feedback input current v fb = 1.22v 1 50 na quiescent current, burst mode operation v c = 0v, mode/sync = 3v (note 3) 40 50 a quiescent current, shutdown shdn = 0v, not including switch leakage 0.1 1 a quiescent current, active v c = 0v, mode/sync = 0v (note 3) 2800 4000 a nmos switch leakage switches b and c 0.1 5 a pmos switch leakage switches a and d 0.1 10 a nmos switch on resistance switches b and c 0.19 1 pmos switch on resistance switches a and d 0.22 1 input current limit 1a maximum duty cycle boost (% switch c on) 55 75 % buck (% switch a on) 100 % minimum duty cycle 0% frequency accuracy 0.8 1 1.2 mhz mode/sync threshold 0.4 2 v mode/sync input current v mode/sync = 5.5v 0.01 1 a error amp avol 90 db error amp source current 15 a error amp sink current 380 a (note 1) v in , v out voltage ........................................ C 0.3v to 6v sw1, sw2 voltage ..................................... C 0.3v to 6v v c , r t , fb, shdn/ss, mode/sync voltage .................................. C 0.3v to 6v order part number KB3440edd t jmax = 125 c, e ja = 130 c/ w 1 layer board e ja = 100 c/ w 4 layer board e jc = 45 c/ w the denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = v out = 3.6v, r t = 60k, unless otherwise noted. dd part marking xxxx 1 2 3 4 5 r t mode/sync sw1 sw2 gnd 10 9 8 7 6 v c fb shdn/ss v in v out top view ms package 10-lead plastic msop operating temperature range (note 2) .. C 40 c to 85 c storage temperature range ................. C 65 c to 125 c lead temperature (soldering, 10 sec).................. 300 c order part number KB3440ems ms part marking hx-aa top view dd package 10-lead (3mm 3mm) plastic dfn exposed pad (pin 11) is gnd must be soldered to pcb 10 9 6 7 8 4 5 3 2 1 v c fb shdn/ss v in v out r t mode/sync sw1 sw2 gnd 11 t jmax = 125 c, e ja = 43 c/ w, e jc = 3 c/ w KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 absolute maximum ratings pacage/order information electrical characteristics
3 li-ion to 3.3v efficiency (f osc = 300khz) output current (ma) 30 efficiency (%) 90 100 20 80 50 70 60 40 0.1 10 100 1000 1 burst mode operation v in = 3.3v v in = 2.5v power loss (mw) v in = 4.2v 0.1 1 10 100 1000 f osc = 1mhz v in = 3.3v output current (ma) 30 efficiency (%) 90 100 20 80 50 70 60 40 0.1 10 100 1000 1 burst mode operation v in = 2.5v v in = 3.3v f osc = 2mhz v in = 4.2v li-ion to 3.3v efficiency, power loss (f osc = 1mhz) li-ion to 3.3v efficiency (f osc = 2mhz) switch pins during buck/boost switch pins on the edge of buck/boost and approaching boost sw1 2v/div sw2 2v/div v in = 3.78v 50ns/div v out = 3.3v i out = 250ma sw1 2v/div sw2 2v/div v in = 3.42v 50ns/div v out = 3.3v i out = 250ma switch pins on the edge of buck/boost and approaching buck sw1 2v/div sw2 2v/div v in = 4.15v 50ns/div v out = 3.3v i out = 250ma note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2 : the KB3440e is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the C 40 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: current measurements are performed when the outputs are not switching. parameter conditions min typ max units shdn/ss threshold when ic is enabled 0.4 1 1.5 v when ea is at maximum boost duty cycle 2.2 v shdn/ss input current v shdn = 5.5v 0.01 1 a the denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v in = v out = 3.6v, r t = 60k, unless otherwise noted. output current (ma) 30 efficiency (%) 90 100 20 80 50 70 60 40 0.1 10 100 1000 1 burst mode operation v in = 2.5v v in = 3.3v f osc = 300khz v in = 4.2v KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 electrical characteristics typical performance characteristics
4 active quiescent current burst mode quiescent current error amp source current temperature ( c) C55 400 v in + v out current ( a) 450 500 550 C25 5 35 65 95 125 v in = v out = 3.6v temperature ( c) C55 10 v in + v out current ( a) 20 30 40 C25 5 35 65 95 125 v in = v out = 3.6v temperature ( c) C55 5 e/a source current ( a) 10 15 20 C25 5 35 65 95 125 v in = v out = 3.6v output frequency nmos r ds(on) feedback voltage temperature ( c) C55 0.90 frequency (mhz) 0.95 1.00 1.05 1.10 C25 5 35 65 95 125 v in = v out = 3.6v temperature ( c) C55 0.10 nmos r ds(on) ( 1 ) 0.15 0.20 0.25 0.30 C25 5 35 65 95 125 v in = v out = 3.6v switches b and c temperature ( c) C55 1.196 feedback voltage (v) 1.216 1.236 C25 5 35 65 95 125 v in = v out = 3v switch pins in buck mode v out ripple during buck, buck/boost and boost modes sw1 2v/div sw2 2v/div v in = 5v 250ns/div v out = 3.3v i out = 250ma switch pins in boost mode sw1 2v/div sw2 2v/div v in = 2.5v 250ns/div v out = 3.3v i out = 250ma v out 10mv/div ac coupled l = 10 h1 s/div c out = 22 f i out = 250ma f osc = 1mhz buck v in = 5v buck/boost v in = 3.78v boost v in = 2.5v KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 typical performance characteristics
5 boost max duty cycle minimum start voltage current limit temperature ( c) C55 70 duty cycle (%) 75 80 85 90 C25 5 35 65 95 125 v in = v out = 3.6v r t = 60k temperature ( c) C55 2.25 minimum start voltage (v) 2.30 2.35 2.40 C25 5 35 65 95 125 temperature ( c) C55 1000 current limit (a) 1500 2000 2500 3000 C25 5 35 65 95 125 v in = v out = 3.6v peak switch average input feedback voltage line regulation error amp sink current pmos r ds(on) temperature ( c) C55 60 line regulation (db) 70 80 90 C25 5 35 65 95 125 v in = v out = 2.5v to 5.5v temperature ( c) C55 350 e/a sink current ( a) 370 390 410 430 C25 5 35 65 95 125 v in = v out = 3.6v temperature ( c) C55 0.10 pmos r ds(on) ( 1 ) 0.15 0.20 0.25 0.30 C25 5 35 65 95 125 v in = v out = 3.6v switches a and d KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 typical performance characteristics
6 r t (pin 1): timing resistor to program the oscillator frequency. the programming frequency range is 300khz to 2mhz. f r hz osc t = 610 10 ? mode/sync (pin 2): mode/sync = external clk : syn- chronization of the internal oscillator. a clock frequency of twice the desired switching frequency and with a pulse width between 100ns and 2 s is applied. the oscillator free running frequency is set slower than the desired synchronized switching frequency to guarantee sync. the oscillator r t component value required is given by: r f t sw = 810 10 ? where f sw = desired synchronized switching frequency. sw1 (pin 3): switch pin where the internal switches a and b are connected. connect inductor from sw1 to sw2. an optional schottky diode can be connected from sw1 to ground. minimize trace length to keep emi down. sw2 (pin 4): switch pin where the internal switches c and d are connected. for applications with output volt- ages over 4.3v, a schottky diode is required from sw2 to v out to ensure the sw pin does not exhibit excess voltage. gnd (pin 5): signal and power ground for the ic. v out (pin 6): output of the synchronous rectifier. a filter capacitor is placed from v out to gnd. v in (pin 7): input supply pin. internal v cc for the ic. a ceramic bypass capacitor as close to the v in pin and gnd (pin 5) is required. shdn/ss (pin 8): combined soft-start and shutdown. grounding this pin shuts down the ic. tie to >1.5v to enable the ic and > 2.5v to ensure the error amp is not clamped from soft-start. an rc from the shutdown com- mand signal to this pin will provide a soft-start function by limiting the rise time of the v c pin. fb (pin 9): feedback pin. connect resistor divider tap here. the output voltage can be adjusted from 2.5v to 5.5v. the feedback reference voltage is typically 1.22v. v c (pin 10): error amp output. a frequency compensation network is connected from this pin to the fb pin to compensate the loop. see the section compensating the feedback loop for guidelines. exposed pad (pin 11, dfn package only): ground. this pin must be soldered to the pcb and electrically connected to ground. KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 pin functions
7 C + C + C + C + C + C + 7 pwm logic and output phasing gate drivers and anticross conduction burst mode operation control 5 s delay gnd uvlo 2.7a 2.4v r t sleep mode/sync 1 = burst mode operation 0 = fixed frequency r t osc sync supply current limit sw a sw1 sw2 v in 2.5v to 5.5v sw d i sense amp error amp 1.22v clamp reverse current limit sw b sw c C0.4a 1 2 5 8 + 3 4 v out 6 fb 9 v c 10 shdn/ss shutdown r ss v in r2 c ss r1 v out 2.5v to 5.5v pwm comparators KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 simplified bloc diagram
8 the KB3440 provides high efficiency, low noise power for applications such as portable instrumentation. the kingbor technology allows input voltages above, below or equal to the output voltage by properly phasing the output switches. the error amp output voltage on the v c pin determines the output duty cycle of the switches. since the v c pin is a filtered signal, it provides rejection of frequencies from well below the switching frequency. the low r ds(on) , low gate charge synchronous switches pro- vide high frequency pulse width modulation control at high efficiency. schottky diodes across the synchronous switch d and synchronous switch b are not required, but provide a lower drop during the break-before-make time (typically 15ns). the addition of the schottky diodes will improve peak efficiency by typically 1% to 2% at 600khz. high efficiency is achieved at light loads when burst mode operation is entered and when the ics quiescent current is a low 25 a. low noise fixed frequency operation oscillator the frequency of operation is user programmable and is set through a resistor from the r t pin to ground where: f e r hz t = 2 | 610 an internally trimmed timing capacitor resides inside the ic. the oscillator can be synchronized with an external clock applied to the mode/sync pin. a clock frequency of twice the desired switching frequency and with a pulse width between 100ns and 2 s is applied. the oscillator r t component value required is given by: r f t sw = 810 10 ? where f sw = desired synchronized switching frequency. for example to achieve a 1.2mhz synchronized switching frequency the applied clock frequency to the mode/sync pin is set to 2.4mhz and the timing resistor, r t , is set to 66.5k (closest 1% value). error amp the error amplifier is a voltage mode amplifier. the loop compensation components are configured around the amplifier to provide loop compensation for the converter. the shdn/ss pin will clamp the error amp output, v c , to provide a soft-start function. supply current limit the current limit amplifier will shut pmos switch a off once the current exceeds 2.7a typical. the current ampli- fier delay to output is typically 50ns. reverse current limit the reverse current limit amplifier monitors the inductor current from the output through switch d. once a negative inductor current exceeds C 400ma typical, the ic will shut off switch d. output switch control figure 1 shows a simplified diagram of how the four internal switches are connected to the inductor, v in , v out and gnd. figure 2 shows the regions of operation for the KB3440 as a function of the internal control voltage, v ci . the v ci voltage is a level shifted voltage from the output of the error amp (v c pin) (see figure 5). the output switches are properly phased so the transfer between operation modes is continuous, filtered and transparent to the user. when v in approaches v out the buck/boost region is reached where the conduction time of the four switch region is typically 150ns. referring to figures 1 and 2, the various regions of operation will now be described. figure 1. simplified diagram of output switches 3 sw1 4 sw2 pmos a nmos b 7 v in pmos d nmos c 3440 f01 6 v out v out KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 operation
9 buck region (v in > v out ) switch d is always on and switch c is always off during this mode. when the internal control voltage, v ci , is above voltage v1, output a begins to switch. during the off time of switch a, synchronous switch b turns on for the remainder of the time. switches a and b will alternate similar to a typical synchronous buck regulator. as the control voltage increases, the duty cycle of switch a increases until the maximum duty cycle of the converter in buck mode reaches d max _ buck , given by: d max _ buck = 100 C d4 sw % where d4 sw = duty cycle % of the four switch range. d4 sw = (150ns ? f) ? 100 % where f = operating frequency, hz. beyond this point the four switch, or buck/boost region is reached. buck/boost or four switch (v in ~ v out ) when the internal control voltage, v ci , is above voltage v2, switch pair ad remain on for duty cycle d max_buck , and the switch pair ac begins to phase in. as switch pair ac phases in, switch pair bd phases out accordingly. when the v ci voltage reaches the edge of the buck/boost range, at voltage v3, the ac switch pair completely phase out the bd pair, and the boost phase begins at duty cycle d4 sw . figure 2. switch control vs internal control voltage, v ci the input voltage, v in , where the four switch region begins is given by: v v ns f v in out = 1 150 C( ? ) the point at which the four switch region ends is given by: v in = v out (1 C d) = v out (1 C 150ns ? f) v boost region (v in < v out ) switch a is always on and switch b is always off during this mode. when the internal control voltage, v ci , is above voltage v3, switch pair cd will alternately switch to provide a boosted output voltage. this operation is typical to a synchronous boost regulator. the maximum duty cycle of the converter is limited to 75% typical and is reached when v ci is above v4. burst mode operation burst mode operation is when the ic delivers energy to the output until it is regulated and then goes into a sleep mode where the outputs are off and the ic is consuming only 40 a. in this mode the output ripple has a variable frequency component that depends upon load current. during the period where the device is delivering energy to the output, the peak current will be equal to 400ma typical and the inductor current will terminate at zero current for each cycle. in this mode the maximum average output current is given by: i v vv a out max burst in out in () .? 5 + 01 burst mode operation is user controlled, by driving the mode/sync pin high to enable and low to disable. the peak efficiency during burst mode operation is less than the peak efficiency during fixed frequency because the part enters full-time 4-switch mode (when servicing the output) with discontinuous inductor current as illus- trated in figures 3 and 4. during burst mode operation, the control loop is nonlinear and cannot utilize the control 75% d max boost d min boost d max buck duty cycle 0% v4 ( 5 2.05v) v3 ( 5 1.65v) boost region buck region buck/boost region v2 ( 5 1.55v) v1 ( 5 0.9v) 3440 f02 a on, b off pwm cd switches d on, c off pwm ab switches four switch pwm internal control voltage, v ci KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 operation
10 voltage from the error amp to determine the control mode, therefore full-time 4-switch mode is required to maintain the buck/boost function. the efficiency below 1ma becomes dominated primarily by the quiescent current and not the peak efficiency. the equation is given by: efficiency burst ( bm) ? i load 5 + d 25 a i load where ( d bm) is typically 79% during burst mode opera- tion for an esr of the inductor of 50m 1 . for 200m 1 of inductor esr, the peak efficiency ( d bm) drops to 75%. burst mode operation to fixed frequency transient response when transitioning from burst mode operation to fixed frequency, the system exhibits a transient since the modes of operation have changed. for most systems this tran- sient is acceptable, but the application may have stringent input current and/or output voltage requirements that dictate a broad-band voltage loop to minimize the tran- sient. lowering the dc gain of the loop will facilitate the task (10m fb to v c ) at the expense of dc load regulation. type 3 compensation is also recommended to broad band the loop and roll off past the two pole response of the lc of the converter (see closing the feedback loop). 7 v in a 3 sw1 5 gnd 4 sw2 l +C 6 v out d c 400ma i inductor 0ma 3440 f03 t1 b di dt v in l 5 7 v in a 3 sw1 5 gnd 4 sw2 l C+ 6 v out d c 400ma i inductor 0ma 3440 f04 t2 b di dt v out l 5 C figure 3. inductor charge cycle during burst mode operation figure 4. inductor discharge cycle during burst mode operation KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 operation
11 soft-start the soft-start function is combined with shutdown. when the shdn/ss pin is brought above typically 1v, the ic is enabled but the ea duty cycle is clamped from the v c pin. component selection figure 5. soft-start circuitry C + 9 10 v in error amp 1.22v 15 a fb r1 r2 c p1 v c v out 8 shdn/ss c ss 1v enable signal r ss soft-start clamp to pwm comparators chip enable ? + v ci inductor selection the high frequency operation of the KB3440 allows the use of small surface mount inductors. the inductor cur- rent ripple is typically set to 20% to 40% of the maximum inductor current. for a given ripple the inductance terms are given as follows: l vvv f i ripple v h l vv v f i ripple v h in min out in min out max out out in max out out max in max > () > () () () () () () () ?C ??? , ?C ??? 2 2 where f = operating frequency, mhz a detailed diagram of this function is shown in figure 5. the components r ss and c ss provide a slow ramping voltage on the shdn/ss pin to provide a soft-start function. figure 6. recommended component placement. traces carrying high current are direct. trace area at fb and v c pins are kept low. lead length to battery should be kept short gnd c2 d2 KB3440 multiple vias l1 r t v c fb shdn/ss v in v out mode/sync sw1 gnd sw2 d1 v in r1 r2 v out c1 1 2 3 4 5 10 9 8 7 6 KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 operation applications information
12 the output capacitance is usually many times larger in order to handle the transient response of the converter. for a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired tran- sient response. the other component of ripple is due to the esr (equiva- lent series resistance) of the output capacitor. low esr capacitors should be used to minimize output voltage ripple. for surface mount applications, taiyo yuden ce- ramic capacitors, avx tps series tantalum capacitors or sanyo poscap are recommended. input capacitor selection since the v in pin is the supply voltage for the ic it is recommended to place at least a 4.7 f, low esr bypass capacitor. table 2. capacitor vendor information supplier phone fax web site avx (803) 448-9411 (803) 448-1943 www.avxcorp.com sanyo (619) 661-6322 (619) 661-1055 www.sanyovideo.com taiyo yuden (408) 573-4150 (408) 573-4159 www.t-yuden.com optional schottky diodes to achieve a 1%-2% efficiency improvement above 50mw, schottky diodes can be added across synchronous switches b (sw1 to gnd) and d (sw2 to v out ). the schottky diodes will provide a lower voltage drop during the break- before-make time (typically 15ns) of the nmos to pmos transition. general purpose diodes such as a 1n914 are not recommended due to the slow recovery times and will compromise efficiency. if desired a large schottky diode, such as an mbrm120t3, can be used from sw2 to v out . a low capacitance schottky diode is recommended from gnd to sw1 such as a phillips pmeg2010ea or equivalent. ripple = allowable inductor current ripple (e.g., 0.2 = 20%) v in(min) = minimum input voltage, v v in(max) = maximum input voltage, v v out = output voltage, v i out(max) = maximum output load current for high efficiency, choose an inductor with a high fre- quency core material, such as ferrite, to reduce core loses. the inductor should have low esr (equivalent series resistance) to reduce the i 2 r losses, and must be able to handle the peak inductor current without saturating. molded chokes or chip inductors usually do not have enough core to support the peak inductor currents in the 1a to 2a region. to minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. see table 1 for suggested components and table 2 for a list of component suppliers. table 1. inductor vendor information supplier phone fax web site coilcraft (847) 639-6400 (847) 639-1469 www.coilcraft.com coiltronics (561) 241-7876 (561) 241-9339 www.coiltronics.com murata usa: usa: www.murata.com (814) 237-1431 (814) 238-0490 (800) 831-9172 sumida usa: www.japanlink.com/ (847) 956-0666 (847) 956-0702 sumida japan: 81(3) 3607-5111 81(3) 3607-5144 output capacitor selection the bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. the steady state ripple due to charge is given by: %_ ?C ? ?? % %_ ?C? ??? % () () () () () ripple boost ivv cv f ripple buck ivv cv vf out max out in min out out out max in max out out in max out = () = () 100 100 2 where c out = output filter capacitor, f KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 applications information
13 output voltage > 4.3v a schottky diode from sw to v out is required for output voltages over 4.3v. the diode must be located as close to the pins as possible in order to reduce the peak voltage on sw2 due to the parasitic lead and trace inductance. input voltage > 4.5v for applications with input voltages above 4.5v which could exhibit an overload or short-circuit condition, a 2 1 / 1nf series snubber is required between the sw1 pin and gnd. a schottky diode such as the phillips pmeg2010ea or equivalent from sw1 to v in should also be added as close to the pins as possible. for the higher input voltages v in bypassing becomes more critical, therefore, a ceramic bypass capacitor as close to the v in and gnd pins as possible is also required. operating frequency selection there are several considerations in selecting the operating frequency of the converter. the first is, what are the sensitive frequency bands that cannot tolerate any spec- tral noise? for example, in products incorporating rf communications, the 455khz if frequency is sensitive to any noise, therefore switching above 600khz is desired. some communications have sensitivity to 1.1mhz and in that case a 2mhz converter frequency may be employed. other considerations are the physical size of the converter and efficiency. as the operating frequency goes up, the inductor and filter capacitors go down in value and size. the trade off is in efficiency since the switching losses due to gate charge are going up proportional with frequency. additional quiescent current due to the output switches gate charge is given by: buck: 500e C12 ? v in ? f boost: 250e C12 ? (v in + v out ) ? f buck/boost: f ? (750e C12 ? v in + 250e C12 ? v out ) where f = switching frequency closing the feedback loop the KB3440 incorporates voltage mode pwm control. the control to output gain varies with operation region (buck, boost, buck-boost), but is usually no greater than 15. the output filter exhibits a double pole response is given by: f lc hz in buck e filter pole out _ ?? ? mod = / 1 2 () f v lv hz in boost e filter pole in out _ ?? mod = / 2 () where c out is the output filter capacitor. the output filter zero is given by: f rc hz filter zero esr out _ ?? ? = / 1 2 where r esr is the capacitor equivalent series resistance. a troublesome feature in boost mode is the right-half plane zero (rhp), and is given by: f v ilv hz rhpz in out out = / 2 2? ? ? ? the loop gain is typically rolled off before the rhp zero frequency. a simple type i compensation network can be incorpo- rated to stabilize the loop but at a cost of reduced band- width and slower transient response. to ensure proper phase margin, the loop requires to be crossed over a decade before the lc double pole. the unity-gain frequency of the error amplifier with the type i compensation is given by: f rcp hz ug = / 1 211 ?? ? most applications demand an improved transient response to allow a smaller output filter capacitor. to achieve a higher bandwidth, type iii compensation is required. two zeros are required to compensate for the double-pole response. KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 applications information
14 short-circuit improvements the KB3440 is current limited to 2.7a peak to protect the ic from damage. at input voltages above 4.5v a current limit condition may produce undesirable voltages to the ic due to the series inductance of the package, as well as the figure 8. error amplifier with type iii compensation 1.22v r1 r2 3440 f08 fb 9 v c c p1 c z1 r z v out 10 c p2 C + error amp figure 7. error amplifier with type i compensation 1.22v r1 r2 3440 f07 fb 9 v c c p1 v out 10 C + error amp f erc hz which is extremely close to dc f rc hz f rc hz f rc hz pole p zero zp zero z pole zp 1 3 1 1 1 2 1 2 2 1 232 1 1 2 1 21 1 2 5 / = / = / = / ?? ? ? ?? ? ?? ? ?? ? traces and external components. following the recom- mendations for output voltage >4.3v and input voltage >4.5v will improve this condition. additional short-circuit protection can be accomplished with some external cir- cuitry. in an overload or short-circuit condition the KB3440 voltage loop opens and the error amp control voltage on the v c pin slams to the upper clamp level. this condition forces boost mode operation in order to attempt to provide more output voltage and the ic hits a peak switch current limit of 2.7a. when switch current limit is reached switches b and d turn on for the remainder of the cycle to reverse the volts ? seconds on the inductor. although this prevents current run away, this condition produces four switch operation producing a current foldback characteristic and the average input current drops. the ic is trimmed to guarantee greater than 1a average input current to meet the maximum load demand, but in a short-circuit or overload condition the foldback characteristic will occur producing higher peak switch currents. to minimize this affect during this condition the following circuits can be utilized. restart circuit for a sustained short-circuit the circuit in figure 9 will force a soft-start condition. the only design constraint is that r2/c2 time constant must be longer than the soft- start components r1/c1 to ensure start-up. figure 9. soft-start reset circuitry for a sustained short-circuit c2 10nf c1 4.7nf r2 1m r1 1m v out v in soft-start so/ss m2 nmos vn2222 m1 nmos vn2222 d1 1n4148 3440 f09 KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 applications information
15 figure 10. simple input current control utilizing the voltage loop 3-cell to 3.3v at 600ma converter sw1 v in shdn/ss mode/sync r t sw2 v out fb v c gnd 3 7 8 2 1 4 6 9 10 5 KB3440 l1 4.7 h d1 r3 15k r5 10k r1 340k r2 200k r t 45.3k f osc = 1.5mhz c1: taiyo yuden jmk212bj106mg c2: taiyo yuden jmk325bj226mm d1, d2: central semiconductor cmdsh2-3 l1: sumida cdr43-4r7m *1 = burst mode operation 0 = fixed frequency c1 10 f 3 cells v in = 2.7v to 4.5v * c4 150pf c3 33pf d2 c5 10pf c2 22 f v out 3.3v 600ma + output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 0 1 burst mode operation v in = 2.7v v in = 3.3v f osc = 1.5mhz v in = 4.5v 3-cell to 3.3v efficiency input_voltage fb_pin vin_pin q1 2n3906 r1 0.5 1 c1 10 f v1 simple average input current control a simple average current limit circuit is shown in figure 10. once the input current of the ic is above approximately 1a, q1 will start sourcing current into the fb pin and lower the output voltage to maintain the average input current. since the voltage loop is utilized to perform average current limit, the voltage control loop is maintained and the v c voltage does not slam. the averag- ing function of current comes from the fact that voltage loop compensation is also used with this circuit. KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 applications information typical application
16 low profile (<1.1mm) li-ion to 3.3v at 200ma converter sw1 v in shdn/ss mode/sync r t sw2 v out fb v c gnd 3 7 8 2 1 4 6 9 10 5 KB3440 l1 4.7 h r1 340k r2 200k r3 15k r t 30.1k c1: taiyo yuden jmk212bj475mg c2: taiyo yuden jmk212bj475mg l1: coilcraft lpo1704-472m *1 = burst mode operation 0 = fixed frequency f osc = 2mhz c1 4.7 f li-ion v in = 2.5v to 4.2v * + c4 1.5nf c2 4.7 f v out 3.3v 200ma output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 0 1 burst mode operation v in = 2.5v v in = 3.3v v in = 4.2v efficiency 3-cell to 5v boost converter with output disconnect sw1 v in shdn/ss mode/sync r t sw2 v out fb v c gnd 3 7 8 2 1 4 6 9 10 5 KB3440 l1 10 h r1 619k r2 200k r t 60.4k c1: taiyo yuden jmk212bj106mg c2: taiyo yuden jmk325bj226mm d1: on semiconductor mbrm120t3 l1: sumida cdrh4d28-100 *1 = burst mode operation 0 = fixed frequency ** locate components as close to ic as possible c1 10 f c3 0.1 f 3 cells r4 1m v in = 2.7v to 4.5v * sd c4 1.5nf 15k f osc = 1mhz c2** 22 f v out 5v 300ma + d1** output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 0 1 burst mode operation v in = 2.7v f osc = 1mhz v in = 3.6v v in = 4.5v 3-cell to 5v boost efficiency KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 typical application
17 sw1 v in shdn/ss mode/sync r t sw2 v out fb v c gnd 3 7 8 2 1 4 6 9 10 5 KB3440 l1 3.3 h r1 340k r5 10k r2 200k r3 15k d1** r t 30.1k c1, c2: taiyo yuden jmk212bj106mm d1: on semiconductor mbrm120t3 l1: sumida cdrh4d28-3r3 *1 = burst mode operation 0 = fixed frequency ** locate components as close to ic as possible c1 10 f f osc = 2mhz li-ion v in = 2.5v to 4.2v * + c4 150pf c5 10pf c2** 10 f v out 0.4v to 5v c3 33pf v out = 3.3v C 1.7v ? (v dac C 1.22v) r6 200k dac wcdma power amp power supply with dynamic voltage control efficiency of the wcdma power amp power supply input voltage (v) 2.5 efficiency (%) 92 96 100 4.5 88 84 90 94 98 86 82 80 3 3.5 4 5 v out = 3.4v i out = 100ma i out = 250ma i out = 600ma sw1 v in shdn/ss mode/sync r t sw2 v out fb v c gnd 3 7 8 2 1 4 6 9 10 5 KB3440 l1 10 h r5 24k r t 60.4k r s 0.1 1 r4 1k c1: taiyo yuden jmk212bj106mg c2: taiyo yuden jmk325bj226mm l1: sumida cdrh-4d28-100 *1 = burst mode operation 0 = fixed frequency c1 10 f v in 2.5v to 5.5v usb/pcmcia power 500ma max * v out 3.6v 2a (pulsed) c5 10nf r6 130k r1 392k r2 200k C + 1/2 lt1490a 2n3906 ? + 1/2 lt1490a 1n914 c6 to c9 470 f 4 1.22 ? r4 r5 ? r s i currentlimit = gsm modem powered from usb or pcmcia with 500ma input current limit KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 typical application
18 dd package 10-lead plastic dfn (3mm 3mm) 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the kb website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 0.10 bottom viewexposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dd10) dfn 1103 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.50 0.05 package outline 0.25 0.05 0.50 bsc KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 pacage description
19 ms package 10-lead plastic msop msop (ms) 0603 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C 0.27 (.007 C .011) typ 0.127 0.076 (.005 .003) 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8 9 10 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 C 6 typ detail a detail a gauge plane 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 pacage description
20 king b or technology tel:(86)0755-26508846 fax:(86)0755-26509052 www.kingbor.com efficiency output current (ma) efficiency (%) 100 90 80 70 60 50 40 30 20 10 0 0.1 10 100 1000 1.0 v in = 4.2v v in = 3.3v burst mode operation li-ion to 3.3v at 600ma buck-boost converter sw1 v in shdn/ss mode/sync r t sw2 v out fb v c gnd 3 7 8 2 1 4 6 9 10 5 KB3440 l1 10 h r1 340k r2 200k r3 15k r t 60.4k c1: taiyo yuden jmk212bj106mg c2: taiyo yuden jmk325bj226mm l1: sumida cdrh4d28-100 *1 = burst mode operation 0 = fixed frequency c1 10 f li-ion v in = 2.8v to 4.2v * + c5 300pf c2 22 f v out 3.3v 600ma 220pf 2.2k KB3440 kingbor technology co.,ltd tel:(86)0755-26508846 fax:(86)0755-26509052 typical application

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